MAX1104EUA+【PDF 3/17 页】IC CODEC 8BIT 8-UMAX

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Serial Interface and Control Logic

The MAX1102/MAX1103/MAX1104 have 4-wire serial

interfaces (Figure 4). The CS, SCLK, and DIN inputs

are used to control and configure the device, while the

three-state DOUT provides access to the ADC conver-

sion result. DIN also serves as the data input to the

DAC.

The serial interface provides easy connection to Cs

with SPI, QSPI, and MICROWIRE serial interfaces at

clock rates up to 6MHz. For SPI and QSPI, set CPOL =

CPHA = 0 in the SPI control registers of the C. Figure

4 gives detailed timing information.

Digital Inputs and Outputs

The logic levels of the MAX1102/MAX1103/MAX1104

digital inputs are set to accept voltage levels from both

+3V and +5V systems regardless of the supply volt-

ages.

Performing a Conversion

Configuring the MAX1102/MAX1103/MAX1104

The MAX1102/MAX1103/MAX1104 must be configured

before a conversion can occur. Following CS falling, on

each rising edge of SCLK, a bit from DIN is clocked

into the MAX1102/MAX1103/MAX1104’s internal shift

defines the MSB of the control byte (START). Until the

START bit arrives, any number of logic “0” bits can be

clocked into DIN with no effect. Table 1 shows the con-

trol-byte format.

The control word sets the mode in which the MAX1102/

MAX1103/MAX1104 operate. The enable bits, E0 to E2,

determine what sections of the device are operating by

either enabling or shutting down the two converters and

voltage reference (see

Shutdown Modes). The enable

bits are independent of the address bits; for example,

the ADC need not be addressed for it to be shutdown

or powered up.

C0 and C1 are the control bits. C0 sets the conversion

mode, either single or continuous (see

Conversion

Modes). C1 determines whether the ADC monitors

VDD/2 or AIN (see Power Sense). When changing C1,

two control words must be written. The first control

word changes the state of the mux. Then wait 3.5s for

the T/H to acquire the new input. Finally, the second

control word causes the conversion to take place. For

MAX1104 set C1 = 0.

A0 is the ADC address bit. A logic “1” on A0 addresses

the ADC. The control word configures the ADC. A logic

“0” on A0 deselects the ADC. In this state, the ADC is

still active, but does not perform any conversions.

A1 is the DAC address bit. A logic “1” on A1 address-

es the DAC. The control word configures the DAC, and

the eight bits following the control word are read in as

DAC data. The converted analog output is available

after the eighth data bit is read into the device. A logic

“0” deselects the DAC. In this state the DAC is still

active, but ignores any digital inputs.

Both the ADC and DAC can be addresses from the

same control word, allowing both converters to operate

simultaneously.

MAX1102/MAX1103/MAX1104

8-Bit CODECs

______________________________________________________________________________________

BIT

NAME

DESCRIPTION

7 (MSB)

START

1 = designates a new control word. 0 = control word ignored, unless byte is DAC data.

6A1

1 = DAC addressed. Current byte configures DAC, the following byte is DAC data.

0 = DAC not addressed.

5A0

1 = ADC addressed. Current byte configures ADC. After the 36

s conversion time, the next eight

clock cycles clock out the conversion result.

0 = ADC not addressed.

C1*

1 = ADC input to VDD/2.

0 = ADC input to AIN.

3C0

1 = Continuous conversion. Control word not required unless the device is reconfigured.

0 = Single conversion. New control word required before next conversion.

1 = Reference enabled. 0 = Reference disabled. Don’t care for MAX1104.

1 = ADC enabled. 0 = ADC disabled.

1 = DAC enabled. 0 = DAC disabled.

Table 1. Control-Byte Format

* Leave C1 = 0 for MAX1104.

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